1. Field of the Invention
The present invention generally relates to a trace carrier, in particular, to a trace carrier capable of saving a plane area for trace routing of a layout design.
2. Description of Related Art
In design of a printed circuit board (PCB) layout, designers often encounter with the problem of insufficient trace area. Therefore, they always try hard to squeeze some extra space from the original layout design and sometimes even have to make a big fuss over the variation of the layout design to solve the above problem.
However, the high-speed signal trace for transmitting, for example, the data strobe signal (a kind of differential signal, also called DQS signal) used by the double data rate 2 (DDR2) memory and the double data rate 3 (DDR3) memory has more stringent requirements for the trace length and the trace area. However, the trace area for such high-speed signal trace is hard to handle. Therefore, no good and effective solutions have been set forth to solve the problem of insufficient trace area and the signal transmission quality of the high-speed signal trace will also be influenced by the above problem to a certain extent.